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A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing – hence the term "field-programmable". FPGAs contain an array of programmable logic blocks, and a hierarchy of reconfigurable interconnects that allow the blocks to be "wired together", like many logic gates that can be inter-wired in different configurations. Logic blocks can be configured to perform complex combinational functions, or merely simple logic gates. In most FPGAs, logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of memory. 
Type Part Name LEs PLL User Flash RAM Multipliers Collocation method Package Download
CPLD AG576 576 1 256 Kbits -- -- -- LQFP-100/LQFP-144 NULL
CPLD AG256 256 0 256 Kbits -- -- -- LQFP-100 NULL
CPLD AG1280 1280 1 128 Kbits 68 Kbits -- -- QFN-32/QFN-48 NULL
loT FPGA AG1K 1280 1 68 Kbits 10 Kbits(Distributed RAM) -- SPI Master/Slave WLSCP-16/ucBGA-36/QFN-48 NULL
loT FPGA AG3K 2336 1 54 Kbits 18 Kbits(Distributed RAM) -- SPI Master/Slave QFN-48 NULL
FPGA/+MCU(ARM M3) AG6K 6K 2 414 Kbits -- 23 JTAG,AS/PS LQFP-144/FBGA-256 NULL
FPGA/+MCU(ARM M3) AG10K 10K 2 414 Kbits -- 23 JTAG,AS/PS LQFP-144/FBGA-256 NULL
FPGA/+MCU(ARM M3) AG16K 16K 4 504 Kbits -- 56 JTAG,AS/PS FBGA-256 NULL
FPGA/+SDRAM AG10KSD 10K 2 414 Kbits 64 Mbits(Embedded SDRAM) 23 JTAG,AS/PS EQFP-176 NULL
FPGA/+SDRAM AG16KSD 16K 4 504 Kbits 64 Mbits(Embedded SDRAM) 56 JTAG,AS/PS EQFP-176/FBGA-256 NULL
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